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6610121 
Journal Article 
Floating Gate Organic Memory Device with Tunneling Layer's Thickness 
Lee, BJ; 김희성; 신백균 
2012 
21 
6 
354-361 
KJD:ART001715353 
The organic memory device was made by the plasma polymerization method which was not the dry process but the wet process. The memory device consist of the styrene and MMA monomer as the insulating layer, MMA monomer as the tunneling layer and Au thin film as the memory layer which was fabricated by thermal evaporation method. The I-V characteristics of fabricated memory device got the hysteresis voltage of 27 V at 40/-40V double sweep measuring conditions. At this time, the optimized structure was 7 nm of Au thin film as floating gate, 400 nm of styrene thin film as insulating layer and 30 nm of MMA thin film as tunneling layer. Therefore we got the charge trapping characteristics by the hysteresis voltage. From the paper, styrene indicated a good charge trapping characteristics better than MMA. In the future, we expect to make devices by using styrene thin film rather than Au thin film.